Kumar, Bairi. Rohith, <p>Department of Electronics and Communication Engineering, CMR Institute of Technology, Hyderabad 501401, India.</p>, India

• Journal of Electronic & Information Systems Vol. 7 , Iss. 2 (October 2025) - ARTICLE
  Low – Power TSPC Flip-Flop with Auto-Gated Clock Gating, Power Gating and Redundant-Transition Suppression
  Abstract  PDF